Amethyst Subframe Computer

  • David-P
    17th July Member 2 Permalink

    Amethyst Subframe Computer series
    Model A V1.1

    Amethist Subframe Computer

    Amethist Subframe Computer

    State: This is the list of objectives to be met in the processor, not everything works for now. NOT ALL COMPLETED

     

    Manual.

    Features:

    • 29 bits architecture
    • READ - MODIFY - WRITE instructions (based on the rk2 by LBPHacker)
    • Instruction or data Fetch modes
    • External care buses IN/OUT
    • Operand inverters
    • Result inverter THIS FUNCTION IS NEW (It invalidates or makes useless NAND NOR XNOR NOT)
    • IN/OUT
    • External instructions
    • Sleep mode
    • Two pointers: Program Counter, Address Counter
    • ON/OFF Instructions.
    • Adder with Carry and overflow
    • Shift Right/Left
    • 16 operand registers
    • Bitwise: AND ORR XOR NAND NOR XNOR NOT
    • Pseudorandom number generator
    • 8 jump conditions
    • 1 or 2 Frames instructions
    • More compact than rk2

     

    INSTRUCTION SET:
    (HEX)


    0x20000000 NOP (NO OPERATION, DO NOTHING) INSTRUCTION CLASS 7


    0x21000000 ADD (RGA + RGB) INSTRUCTION CLASS 1
    0x22000000 ADC (RGA + RGB + CARRY) INSTRUCTION CLASS 1
    0x23000000 AND (BITWISE RGA & RGB) INSTRUCTION CLASS 1
    0x24000000 ORR (BITWISE RGA | RGB) INSTRUCTION CLASS 1
    0x25000000 XOR (BITWISE RGA ^ RGB) INSTRUCTION CLASS 1
    0x26000000 BUF (OPERAND A BUFFER) INSTRUCTION CLASS 2
    0x27000000 RSH (RGA >> RGB) INSTRUCTION CLASS 1
    0x28000000 LSH (RGA << RGB) INSTRUCTION CLASS 1


    0x29000000 AEB (EVALUATES IF A EQUAL B) INSTRUCTION CLASS 3
    0x2A000000 (EAO EVALUATES AN OVERFLOW IN OPERAND A) INSTRUCTION CLASS 4
    0x2B000000 IRA (EVALUATES IF INSTRUCTION BUS REQUEST ATENTION) 6

    0x2C000000 ADO

    (EVALUATE THE OVERFLOW RESULTING FROM THE SUM IN 2 OPERANDS) INSTRUCTION CLASS 3


    0x2D000000 DJP (DIRECT JUMP) INSTRUCTION CLASS 5
    0x2E000000 IJP (INDIRECT JUMP) INSTRUCTION CLASS 5


    0x2F000000 HLT (HALT CPU) INSTRUCTION CLASS 7

     

    I differentiate in classes the instructions according
    to their bit field needed to work properly.

     

    INSTRUCTION TYPES:

    CLASS 1

     

    ALU instructions 
    ----------------------------------------------------------------------
    GENERAL DATA:
    ONE FRAME EXECUTION IF NOT FDR (FETCH DATA FROM RAM)

    MSB 0x20000000 LSB

    The MSB of all is here to prevent the BRAY annihilation (0x20000000)
    GENERAL BIT FIELD IN USE
    00 1111 1111 1111 1111 1111 1111 1111
    0x2FFFFFFF

    ----------------------------------------------------------------------
    CLASS 1 INSTRUCTION SET:

    INSTRUCTION SET BIT FIELD

    00 1111 0000 0000 0000 0000 0000 0000
    0x2F000000

     

    0x21000000 ADD (ADD RGA RGB)
    0x22000000 ADC (RGA + RGB + CARRY)
    0x23000000 AND (BITWISE RGA & RGB)
    0x24000000 ORR (BITWISE RGA | RGB)
    0x25000000 XOR (BITWISE RGA ^ RGB)
    0x27000000 RSH (RGA >> RGB)
    0x28000000 LSH (RGA << RGB)
    ----------------------------------------------------------------------
    OPERAND REGISTERS:
    Operand registers are the direct input to the ALU.
    You can choose the operands and both match in addresses,
    register A and B is a single 16-bit register with two pointers.

     

    REGISTER A:
    BIT FIELD
    00 0000 1111 0000 0000 0000 0000 0000
    0x20F00000

     

    ADDRESS
    0x20000000 TO 0x20B00000 READ AND WRITE ENABLE

    0x20C00000 TO 0x20F00000 READ ONLY:

    0x20C00000 EXTERNAL IN A
    0x20D00000 EXTERNAL IN B
    0x20E00000 INSTRUCTION IN EJECUTION (IF FDR DATA READ FROM RAM)
    0x20F00000 PSEUDORANDOM NUMBER GENERATOR

     

    If you write to read-only registers nothing happens,
    only the values will be constantly updated there and you will lose
    everything you save in the next frame,
    it will NOT give you the opportunity to use the data you saved
    this is for the order of update. READ-ONLY, guys.
    ----------------------------------------------------------------------
    REGISTER B:
    BIT FIELD
    00 0000 0000 1111 0000 0000 0000 0000
    0x200F0000

    ADDRESS

    0x20000000 TO 0x200B0000 READ AND WRITE ENABLE

    0x200C0000 TO 0x200F0000 READ ONLY:

    0x200C0000 EXTERNAL IN A
    0x200D0000 EXTERNAL IN B
    0x200E0000 INSTRUCTION IN EJECUTION OR DATA READ FROM RAM
    0x200F0000 PSEUDORANDOM NUMBER GENERATOR
    ----------------------------------------------------------------------

    NEGATION OF OPERANDS:

    As it says here, we can negate (NOT) operation, before it is processed by the ALU or the comparer.

    00 0000 0000 0000 1100 0000 0000 0000
    0x2000C000

     

    0x20000000 NOTHING TO DO

    0x20008000 NOT A

    0x20004000 NOT B

    0x2000C000 NOT A NOT B

    ----------------------------------------------------------------------

    ADDRESS REGISTERS

    This specifies the address register used for reading, it is necessary to specify it when using the instruction: external output, or when the ADDRESS OR DATA TO DESTINATARY mode is address.

     

    00 0000 0000 0000 0011 0000 0000 0000
    0x20003000

     

    0x20000000 Address register (current state)

    0x20001000 Address register (current state + 1) (this no increment the register)

    0x20002000 Program Counter (current state)

    0x20003000 Operand A

    ----------------------------------------------------------------------
    ADDRESS OR DATA TO DESTINATARY:
    The destinatary is the register where the result of the executing
    instruction will be received.
    You can send to destinatary address or data.

    THIS INDICATOR NOT APPLY WEN THE DESTINATARY IS EXTERNAL OUT

    EXTERNAL OUT SEND ADDRESS AND DATA IN THE SAME FRAME.

     

    00 0000 0000 0000 0000 1000 0000 0000
    0x20000800

     

    0x20000000 DATA TO DESTINATARY
    0x20000800 ADDRESS TO DESTINATARY
    ----------------------------------------------------------------------
    DESTINATARY:
    00 0000 0000 0000 0000 0111 0000 0000
    0x20000700


    The destinatary is the register
    where the result of the executing instruction will be writed.

     

    0x20000000 NO SAVE 
    0x20000100 TO OPERAND REGISTERS
    0x20000200 TO RAM
    0x20000300 TO EXTERNAL OUT

    0x20000400 TO FLAG REGISTER

    0x20000500 TO ADDRESS MEMORY

    0x20000600 NO SAVE

    0x20000700 NO SAVE
    ----------------------------------------------------------------------
    DESTINATARY ADDRESS:
    00 0000 0000 0000 0000 0000 1111 0000
    0x200000F0

     

    The addresses of the destinatary are only required
    when the selected register to write is the operand register.
    IF DESTINATARY IS OPERAND REGISTERS:
    0x20000000 TO 0x20000B00 WRITE ENABLE
    ----------------------------------------------------------------------
    NOTHING TO DO IN CLASS 1:
    10 0000 0000 0000 0000 0000 0000 0000
    0x20000000
    ----------------------------------------------------------------------

    INCREMENT ADDRESS COUNTER:
    00 0000 0000 0000 0000 0000 0000 0100
    0x20000004

     

    0x20000000 DO NOTHING
    0x20000004 INCREMENT

     

    This mode of operation is present in ALL classes,

    increases the amount of the address counter by 1.

    In the event that the address counter is read first it will be read
    and then it will be increased by 1 frame.

    In the event that the address counter is written first it will be
    written and then it will be incremented by 1 frame.
    ----------------------------------------------------------------------
    FETCH MODE
    00 0000 0000 0000 0000 0000 0000 0011
    0x20000003

    This mode of operation is present in ALL classes.

     

    0x20000000 FETCH INSTRUCTION FROM RAM AND EXECUTE

     

    0x20000001 IGNORE INSTRUCTION

     

    0x20000002 FETCH DATA FROM RAM: (FDR)
    The executing instruction will be ignored,
    but it will be saved to the stack.
    The next fetch from RAM will be treated as data
    and the previously ignored and saved word instruction
    will be executed. This instruction allows us

    to read ram as data.

     

    0x20000003

    Toggle to always read external instructions
    until there is an external interrupt. 

    This operation activates the external instruction IN request atention bus.

    THE PROGRAM COUNTER STOPS AND THE EXTERNAL

    DEVICE CAN MODIFY THE PROGRAM COUNTER OR MAKE

    INDIRECT JUMPS AND READ OR WRITE THE RAM.


    This instruction is useful for an external device

    to write or read data or instructions into the ram.

    ALLOW US TO MAKE MULTI CORE CPU!!

    If multi core, Memory is called cache L1!

     

    if this mode is activated the rest of the instruction word will be completely ignored, Can also be used as sleep mode.


    External interrupt: 0x30000000

    -------------------------------------------------------------------------------

    For the moment this would be the example of the instruction format.

    EXAMPLES:

     

    0x21001100

    This solve an ADD register 1 + register 0 and write to register 0

     

    0x21100104

    This solve an ADD register 1 + register 0 and write to register 0 AND INCREMENT ADDRESS REGISTER

     

    0x210E0102

    This solve an ADD register 0 + Next RAM cell and write to register 0

    ______________________________________________________________________
    INSTRUCTIONS Class 2: (SOON)

    Edited 41 times by David-P. Last: 21st July
  • David-P
    18th July Member 0 Permalink

    if you have questions ask me

  • NoVIcE
    19th July Member 0 Permalink

    I have a question:
    why are you bigbrain

  • mememan97
    19th July Member 0 Permalink

    i do not get any of this

  • Doge_Paga
    20th July Member 0 Permalink

    I Do not understand What Any Of This Magic Word Mean

  • happykrcheese
    20th July Member 1 Permalink

    @David-P (View Post)

     I am kinda understanding this, but have some questions.

    1. How does the number 0x20000000 convert into the CTYPE? Solved

    2. Where is the register (the storage pixel's X and Y)?

    3. How can I output a value to a display? or get input from a keyboard (for example, the RT2)?

    4. How can I use a static value (such as using 4+3)? Should I store it to a register? How?

    5. What is the initial value of registers?
    Pls answer ASAP!

    Edited 6 times by happykrcheese. Last: 20th July
  • David-P
    21st July Member 0 Permalink

    @happykrcheese (View Post)

     

    1. 0x20000000 0x230F3023 This UPPER 2 is so to avoid BRAY annihilation.

     

    2. I already highlighted the operand memory (in the save).

     

    3. For imput:

    If a specific address is needed, for example, you can send the peripheral address and its mode (reading or writing in this case is reading) through the External output.
    and then evaluate if there is input, and if there is, save in x memory.

     

    For Output:

    Output is the result of the selected instruction word, We can send data and addresses in the same frame and, if necessary, you can use the request Atention out bus.

     

     

    4. Fetch mode (FETCH DATA FROM RAM)  It exists to deal with static values (29-bit integers), in RAM, for example, it works like this, when specifying this search mode we need two variables to specify: The first is the instruction to be executed on the static number, and the second is the static number, at the point where it is reading the static number it will complete the instruction that was specified in the previous memory cell. With this instruction mode you can deal with values stored in RAM, Due to the current limitations in RAM we cannot handle two static integers in one frame, you will have to move one of them to the registers. :(

     

    5. Initial value of register = 0

    If you need to reset completely before shutting down the programs to fill the registers with 0x20000000

     

    The integers can be saved in any way, but to have more order I recommend you save them with the upper bit (0x20000007), I have added OR gates that integrate the upper bit to avoid the annihilation of BRAY, when there is an unexpected annihilation of BRAY some components could break, and break other things.

    Edited 10 times by David-P. Last: 22nd July
  • happykrcheese
    21st July Member 0 Permalink

    @David-P (View Post)

     Is the integer 7 saved as 0x00000007 or 0x20000007?