goglesq
goglesq
2 / 0
30th Sep 2022
30th Sep 2022
PLBD1 (Parallel Low Bandwith Display v1) - A standard for GPU and display IO. Intended for use with 7-segment displays. PLBD1 standard can handle up to 16 digits. All my future GPUs and displays will adapt the PLBD standard.

Comments

  • Jerehmia
    Jerehmia
    30th Sep 2022
    You could do the XOR with FILT logic instead of electric gates. Because you're already converting the segment signals to BRAYs so your digit addressing unit can block them with that SWCH a FILT-based XOR would take no extra time, just some extra space. Either way I'm curious to see how fast you can get a 4 digit display with the single segment driver and the digit addressing design, it's an interesing concept.
  • goglesq
    goglesq
    30th Sep 2022
    The PLBD standard is going to remain non-subframe so that any GPU can be paired with any display.
  • goglesq
    goglesq
    30th Sep 2022
    Doing that requires a chunk of logic gates and might actually be slower, since the logic gates need to do those calculations. Also, you can already do what you're suggesting with a shared NSCN output that is connected to erase. (I'll make an example).
  • Jerehmia
    Jerehmia
    30th Sep 2022
    I've done some work on 7-segment displays and display drivers (id:2785774), and I'd advise you to make a standard where you don't have to clear the display if you want to change it from one number to another one (so if you are on a 0 and want to make an 8 you just switch on the middle horizontal segment for example). This makes the display much faster and easier to read if it's updated quickly. Tip: computing which segments must be changed is done with XOR.