csavas
14th Aug 2019
14th Aug 2019
32768 cell subframe zero latency ROM.
subframe
nolatency
memory
60hz
Comments
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DayTimer253: You will see why I need this much storage once I manage to make a RAM with the same capacity. For storing videos a simple PHOT stack would be enough.
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Only if to save video on it and run it on R2K120...
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Why so much?
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Indeed, one of the big points of LDTC was to be able to have a memory device this large without having to waste a very large amount of empty space to copy columns into. One simply has small read and write heads, whereby one can also have multiple of those to create a multi-port FRAM.
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If the FILT pixel at X=62 Y=20 gets deleted it will print out the primes in reverse order.
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NoVIcE: The first value in the ROM is 2 so it prints 32768 primes. It only writes 0 at the first frame because I connected the address filt to the 1 frame latency part of the incrementor.
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I still have a backlog of subframe saves to review but ho-boy, nice +1
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This is what we call a dual chamber design. Cool!
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technically first 32767 primes are printed, cause 0 is not prime.
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i dont remember upvoting it but i have it upvoted