liardnos
liardnos
7 / 0
26th Feb 2019
19th Feb 2022
No Description provided.

Comments

  • archived_account
    archived_account
    28th Jun 2019
    but they literally power all (full) adders in same time...
  • LBPHacker
    LBPHacker
    27th Jun 2019
    They step the simulation with F and try to get the timing right manually :P Subframe is better in this aspect; there's no timing there, everything happens in every frame.
  • archived_account
    archived_account
    27th Jun 2019
    just a single question: how people synchonize it without DLAYs or smth?
  • NPC2
    NPC2
    27th Jun 2019
    But remember that this deals with binary.
  • NPC2
    NPC2
    27th Jun 2019
    This is a logic diagram. Actually I have not yet experience dealing with XOR and XAND gates, so to truly comprehend this, I must look into their effects on given inputs.
  • allenxch
    allenxch
    26th Feb 2019
    can you explain a little more? for example on adders with a larger bitwise rather than 1.