mniip			
			
			
				 11th Jan 2015
				 12th Jan 2015
			 
			
			
		 
		
			I've reviewed the previous design, which appeared to be totally inefficient, and made this. Also features a 1-per-frame counter setup.		
				
			
							data
							transfer
							sprk
							60hz
							subframe
							electronics
							filt
					
	 
	
	
	
	Comments
		
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@Schmolendevice The CONV/BTRY device at the top is my ingenious invention that creates a subframe down-pointing ARAY (actually down-left) and that can be placed at every 4 pixels. If you were to come up with a narrower design of the same thing I could easily shrink this to 3 pixels per bit.
		 
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Well, I've finally got myself a 3 pixel per bit and 'laterally thinner' vertical binary counter design I just have to outfit with solid spark. Some of the solid spark might probably lower its compactness laterally.
		 
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May i make a binary counter using your save?
		 
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Yep, figured. I'd still imagine there's still a little subframe stuff hidden in the XORs. Plus the BTRY/CONV junctions on top look intimidating but are part of your design. Anyways I will be sticking to my own vertical sub-frame adders for now. Getting somewhere. *well indeed sigma and a prety integral symbol.
		 
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Why do i slightly recognise your symbol...? umm....
		 
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@Schmolendevice Yes I prefer ARAY to FILT[tmp=6]. Those CRAY lines aren't essential but they give a hint of where a CRAY ray (deletion ray in this case) starts and where it leads. I don't seem to see any extra ARAY lines though. The DTECs around that place are essential, you can see a PHOT placed right next to them, those DTECs reset the XOR'ing FILTs to their initial state.
		 
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No, I'm listed in the developers list in F1 text though!
		 
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thought you were a moderater ;/
		 
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@the_new_powder99999 CONV+BTRY depends solely on particle order. If not CONV+BTRY this machine wouldn't be sub-frame.
		 
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well. at least it wouldnt be able to do the filt mem as well.