It's a very good idea.

I have always thought this was a good idea :P

EDIT: Aaaaaand, necroreply.

Lol reviving this thread it looks like. Just wanted to express my support for this idea, it sounds like an amazingly useful space-saver. I understand some people think we have plenty of space already, and perhaps we do, but having circuitry compressed to a 4x4 pixel area would let the main screen look nicer and have less space taken up.

@PowderChallenge (View Post)

 I totally agree.

@Xenocide (View Post)

I would expect NOT gates to be easier for use inside(egrated) chips

also, it would be wise to remove temperature, air, etc. simulation in integrated chipspace

Just look at the chip system in Logisim. Something like that in TPT would be useful.

I suggested a similar idea to this (maybe slightly easier for new players), I completely agree with this, but there may be some lag issues though.

if TPT is not already multi-core, that could be implemented on a seperate thread to make use of the extra cores most computers either have or can virtualize(i.e. HT or physical cores)

@zBuilder (View Post)

 the synchronisation required between threads would probably cause more lag than it would eliminate, probably too difficult to implement across a wide range of architectures too. (correct me if I'm wrong)

@minecraft-physics (View Post)

 depends on the method and how cleanly it can be optimized. for archetectural issues I think usually a high-level programming language can handle the differences,and the compiler should build either the correct archetecture or an executable with a dispatcher so that the best code could be selected on execution. making it multi-threaded,multi-cored though would require at least 2 cores,though most CPUs have more than 2 or HT so that's probably not too big of a problem.