id:3054187

ITAC stands for 'Is This A Computer?'

Instruction Guide:

0:4     opcode

5        use rs2 as an immediate value

6:10   register destination

11:15 register source 1

16:29 register source 2

(MSB is 29, LSB is 0)

Opcodes:

0x10: Freezes program counter

0x01: Self-Destruction

0x2: not use

0x03: BIC;    rd = rs1 & !(rs2)

0x04: OR  ;    rd = rs1 | rs2
0x05: AND;    rd = rs1 & rs2
0x06: XOR;    rd = rs1 ^ rs2
0x07: SRA;    rd = rs1 >> rs2
0x08: SLL;    rd = rs1 << rs2
0x09: SRL;    rd = rs1 >> rs2
0x0A: ADD;    rd = rs1 + rs2
0x0B: SUB;    rd = rs1 - rs2
0x1C: BEQ;    (rs1 == rd) : PC = rs2
0x0C: BNE;    (rs1 != rd) : PC = rs2
0x0D: BLT;    (rs1 < rd) : PC = rs2
0x1D: BGE;    (rs1 >= rd) : PC = rs2

0xE: not use

0xF: not use

? I don't know how to write a proper document(?), so I just left it like this. It could look weird, but I hope you can understand it...

It has a 5-bit-address register; currently, 30 cells are available for general data.

0x00 is always zero; <- This part, I inspired by RISC-V

0x01 is a program counter; you can overwrite some addresses here to jump to any point.

It may use up to 0x03 later, so I recommend using from 0x04.

It's not done yet... I do not know how to materialize memory communications, so I haven't made it yet...